DSP AIC32音频报警

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DSP AIC32音频报警

AIC32 音频警报

Mcbsp 是多通道串行接口，可以当作 SPI 使用，也可以当作非 SPI 功能。 MCBSP 其实就是一个串行总线协议，只不过有两个时钟：接收时钟和发送时钟。这导致接收和发送独立使用自己的钟；还有就是多了两个状态标志信号：一个是发送同步信号一个是接收同步信号。

1 TLV320AIC23 芯片介绍

TLV320AIC23 是一个高性能的多媒体数字语音编解码器，它的内部 ADC 和DAC 转换模块带有完整的数字滤波器。（digital interpolation filter s）数据传输宽度可以是 16 位， 20 位， 24 位和 32 位，采样频率范围支持从 8khz到 96khz。在 ADC 采集达到 96khz 时噪音为 90-dBA，能够高保真的保存音频信号。在 DAC 转换达到 96khz 时噪音为 100-Dba，能够高品质的数字回放音频，在回放时仅仅减少 23 mW。

TLV320AIC23 详细指标：

①高品质的立体声多媒体数字语音编解码器

②在 ADC 采用 48 kHz 采样率时噪音 90-dB

③在 DAC 采用 48 kHz 采样率时噪音 100-dB

④1.42 V – 3.6 V 核心数字电压：兼容 TI F28x DSP 内核电压

⑤2.7 V – 3.6 V 缓冲器和模拟：兼容 TI F28x DSP 内核电压

⑥支持 8-kHz – 96-kHz 的采样频率

⑦软件控制通过 TI McBSP 接口

⑧音频数据输入输出通过 TI McBSP 接口

立体声接口如下图所示：

AIC23 芯片是通过 28335 的 mcbsp 接口来控制和传输音频数据的。下图是 AIC23 芯片的映射寄存器地址及名称。

2 硬件设计

本实验使用到硬件资源如下：

（1）D1 指示灯

（2）TLV320AIC23 音频模块

3 软件设计

Uint16 AIC23Write(int Address,int Data);
void Delay(int time);void Mydelay(Uint32 k);int DA_wptr,y;
Uint16 j=3;/*******************************************************************************
* 函 数 名         : main
* 函数功能		   : 主函数
* 输    入         : 无
* 输    出         : 无
*******************************************************************************/
void main()
{Uint16 temp,i;InitSysCtrl();InitPieCtrl();IER = 0x0000;IFR = 0x0000;InitPieVectTable();LED_Init();TIM0_Init(150,200000);//200msUARTa_Init(4800);InitMcbspaGpio();	//zqInitI2CGpio();I2CA_Init();AIC23Write(0x00,0x00);Delay(100);AIC23Write(0x02,0x00);Delay(100);AIC23Write(0x04,0x7f);Delay(100);AIC23Write(0x06,0x7f);Delay(100);AIC23Write(0x08,0x14);Delay(100);AIC23Write(0x0A,0x00);Delay(100);AIC23Write(0x0C,0x00);Delay(100);AIC23Write(0x0E,0x43);Delay(100);AIC23Write(0x10,0x23);Delay(100);AIC23Write(0x12,0x01);Delay(100);		//AIC23InitInitMcbspa();          // Initalize the Mcbsp-A//发出报警声while(1){for(temp=30000;temp>0;temp-=100){for(i=0;i<2;i++){y=5000;Mydelay(temp);McbspaRegs.DXR1.all = y;// 输出左声道数据McbspaRegs.DXR2.all = y;// 输出右声道数据y=-5000;Mydelay(temp);McbspaRegs.DXR1.all = y;// 输出左声道数据McbspaRegs.DXR2.all = y;// 输出右声道数据}}}
}void I2CA_Init(void)
{// Initialize I2CI2caRegs.I2CSAR = 0x001A;		// Slave address - EEPROM control code#if (CPU_FRQ_150MHZ)             // Default - For 150MHz SYSCLKOUTI2caRegs.I2CPSC.all = 14;   // Prescaler - need 7-12 Mhz on module clk (150/15 = 10MHz)#endif#if (CPU_FRQ_100MHZ)             // For 100 MHz SYSCLKOUTI2caRegs.I2CPSC.all = 9;	    // Prescaler - need 7-12 Mhz on module clk (100/10 = 10MHz)#endifI2caRegs.I2CCLKL = 100;			// NOTE: must be non zeroI2caRegs.I2CCLKH = 100;			// NOTE: must be non zeroI2caRegs.I2CIER.all = 0x24;		// Enable SCD & ARDY interrupts//   I2caRegs.I2CMDR.all = 0x0020;	// Take I2C out of resetI2caRegs.I2CMDR.all = 0x0420;	// Take I2C out of reset		//zq// Stop I2C when suspendedI2caRegs.I2CFFTX.all = 0x6000;	// Enable FIFO mode and TXFIFOI2caRegs.I2CFFRX.all = 0x2040;	// Enable RXFIFO, clear RXFFINT,return;
}Uint16 AIC23Write(int Address,int Data)
{if (I2caRegs.I2CMDR.bit.STP == 1){return I2C_STP_NOT_READY_ERROR;}// Setup slave addressI2caRegs.I2CSAR = 0x1A;// Check if bus busyif (I2caRegs.I2CSTR.bit.BB == 1){return I2C_BUS_BUSY_ERROR;}// Setup number of bytes to send// MsgBuffer + AddressI2caRegs.I2CCNT = 2;I2caRegs.I2CDXR = Address;I2caRegs.I2CDXR = Data;// Send start as master transmitterI2caRegs.I2CMDR.all = 0x6E20;return I2C_SUCCESS;}void Delay(int time)
{int i,j,k=0;for(i=0;i<time;i++)for(j=0;j<1024;j++)k++;
}void Mydelay(Uint32 k)
{while(k--);
}

  // TI File $Revision: /main/15 $
// Checkin $Date: September 20, 2007   14:47:41 $
//###########################################################################
//
// FILE:	DSP2833x_McBSP.c
//
// TITLE:	DSP2833x Device McBSP Initialization & Support Functions.
//
//###########################################################################
// $TI Release: DSP2833x Header Files V1.01 $
// $Release Date: September 26, 2007 $
//############################################################################include "DSP2833x_Device.h"     // DSP2833x Headerfile Include File
#include "DSP2833x_Examples.h"   // DSP2833x Examples Include File//---------------------------------------------------------------------------
// MCBSP_INIT_DELAY determines the amount of CPU cycles in the 2 sample rate
// generator (SRG) cycles required for the Mcbsp initialization routine.
// MCBSP_CLKG_DELAY determines the amount of CPU cycles in the 2 clock
// generator (CLKG) cycles required for the Mcbsp initialization routine.
// For the functions defined in Mcbsp.c, MCBSP_INIT_DELAY and MCBSP_CLKG_DELAY
// are based off of either a 150 MHz SYSCLKOUT (default) or a 100 MHz SYSCLKOUT.
//
// CPU_FRQ_100MHZ and CPU_FRQ_150MHZ are defined in DSP2833x_Examples.h
//---------------------------------------------------------------------------#if CPU_FRQ_150MHZ                                          // For 150 MHz SYSCLKOUT(default)#define CPU_SPD              150E6#define MCBSP_SRG_FREQ       CPU_SPD/4                    // SRG input is LSPCLK (SYSCLKOUT/4) for examples
#endif
#if CPU_FRQ_100MHZ                                          // For 100 MHz SYSCLKOUT#define CPU_SPD              100E6#define MCBSP_SRG_FREQ       CPU_SPD/4                    // SRG input is LSPCLK (SYSCLKOUT/4) for examples
#endif#define MCBSP_INIT_DELAY     2*(CPU_SPD/MCBSP_SRG_FREQ)                  // # of CPU cycles in 2 SRG cycles-init delay
#define CLKGDV_VAL           0
#define MCBSP_CLKG_DELAY     2*(CPU_SPD/(MCBSP_SRG_FREQ/(1+CLKGDV_VAL))) // # of CPU cycles in 2 CLKG cycles-init delay
//---------------------------------------------------------------------------
// InitMcbsp:
//---------------------------------------------------------------------------
// This function initializes the McBSP to a known state.
//void delay_loop(void);		// Delay function used for SRG initialization
void clkg_delay_loop(void); // Delay function used for CLKG initializationvoid InitMcbsp(void)
{InitMcbspa();#if DSP28_MCBSPBInitMcbspb();#endif               // end DSP28_MCBSPB
}void InitMcbspa(void)
{// McBSP-A register settingsMcbspaRegs.SPCR1.all=0;McbspaRegs.SPCR2.all=0;McbspaRegs.SPCR1.all = SPCR10_VAL;McbspaRegs.SPCR2.all = SPCR20_VAL;McbspaRegs.PCR.all = PCR0_VAL;McbspaRegs.XCR1.all = XCR10_VAL;McbspaRegs.XCR2.all = XCR20_VAL;McbspaRegs.RCR1.all = RCR10_VAL;McbspaRegs.RCR2.all = RCR20_VAL;McbspaRegs.DXR1.all = 0;McbspaRegs.MFFINT.bit.RINT = 1;McbspaRegs.SPCR1.bit.RRST = 1;McbspaRegs.SPCR2.bit.XRST = 1;}#if (DSP28_MCBSPB)
void InitMcbspb(void)
{// McBSP-B register settingsMcbspbRegs.SPCR2.all=0x0000;		// Reset FS generator, sample rate generator & transmitterMcbspbRegs.SPCR1.all=0x0000;		// Reset Receiver, Right justify wordMcbspbRegs.SPCR1.bit.DLB = 1;       // Enable loopback mode for test. Comment out for normal McBSP transfer mode.McbspbRegs.MFFINT.all=0x0;			// Disable all interruptsMcbspbRegs.RCR2.all=0x0;			// Single-phase frame, 1 word/frame, No companding	(Receive)McbspbRegs.RCR1.all=0x0;McbspbRegs.XCR2.all=0x0;			// Single-phase frame, 1 word/frame, No companding	(Transmit)McbspbRegs.XCR1.all=0x0;McbspbRegs.SRGR2.bit.CLKSM = 1;		// CLKSM=1 (If SCLKME=0, i/p clock to SRG is LSPCLK)McbspbRegs.SRGR2.bit.FPER = 31;		// FPER = 32 CLKG periodsMcbspbRegs.SRGR1.bit.FWID = 0;              // Frame Width = 1 CLKG periodMcbspbRegs.SRGR1.bit.CLKGDV = CLKGDV_VAL;	// CLKG frequency = LSPCLK/(CLKGDV+1)McbspbRegs.PCR.bit.FSXM = 1;		// FSX generated internally, FSR derived from an external sourceMcbspbRegs.PCR.bit.CLKXM = 1;		// CLKX generated internally, CLKR derived from an external sourcedelay_loop();                // Wait at least 2 SRG clock cyclesMcbspbRegs.SPCR2.bit.GRST=1; // Enable the sample rate generatorclkg_delay_loop();           // Wait at least 2 CLKG cyclesMcbspbRegs.SPCR2.bit.XRST=1; // Release TX from ResetMcbspbRegs.SPCR1.bit.RRST=1; // Release RX from ResetMcbspbRegs.SPCR2.bit.FRST=1; // Frame Sync Generator reset}#endif // end DSP28_MCBSPB// McBSP-A Data Lengths
void InitMcbspa8bit(void)
{McbspaRegs.RCR1.bit.RWDLEN1=0;     // 8-bit wordMcbspaRegs.XCR1.bit.XWDLEN1=0;     // 8-bit word
}void InitMcbspa12bit(void)
{McbspaRegs.RCR1.bit.RWDLEN1=1;     // 12-bit wordMcbspaRegs.XCR1.bit.XWDLEN1=1;     // 12-bit word
}void InitMcbspa16bit(void)
{McbspaRegs.RCR1.bit.RWDLEN1=2;      // 16-bit wordMcbspaRegs.XCR1.bit.XWDLEN1=2;      // 16-bit word
}void InitMcbspa20bit(void)
{McbspaRegs.RCR1.bit.RWDLEN1=3;     // 20-bit wordMcbspaRegs.XCR1.bit.XWDLEN1=3;     // 20-bit word
}void InitMcbspa24bit(void)
{McbspaRegs.RCR1.bit.RWDLEN1=4;     // 24-bit wordMcbspaRegs.XCR1.bit.XWDLEN1=4;     // 24-bit word
}void InitMcbspa32bit(void)
{McbspaRegs.RCR1.bit.RWDLEN1=5;     // 32-bit wordMcbspaRegs.XCR1.bit.XWDLEN1=5;     // 32-bit word
}// McBSP-B Data Lengths
#if (DSP28_MCBSPB)void InitMcbspb8bit(void)
{McbspbRegs.RCR1.bit.RWDLEN1=0;     // 8-bit wordMcbspbRegs.XCR1.bit.XWDLEN1=0;     // 8-bit word
}void InitMcbspb12bit(void)
{McbspbRegs.RCR1.bit.RWDLEN1=1;     // 12-bit wordMcbspbRegs.XCR1.bit.XWDLEN1=1;     // 12-bit word
}void InitMcbspb16bit(void)
{McbspbRegs.RCR1.bit.RWDLEN1=2;      // 16-bit wordMcbspbRegs.XCR1.bit.XWDLEN1=2;      // 16-bit word
}void InitMcbspb20bit(void)
{McbspbRegs.RCR1.bit.RWDLEN1=3;     // 20-bit wordMcbspbRegs.XCR1.bit.XWDLEN1=3;     // 20-bit word
}void InitMcbspb24bit(void)
{McbspbRegs.RCR1.bit.RWDLEN1=4;     // 24-bit wordMcbspbRegs.XCR1.bit.XWDLEN1=4;     // 24-bit word
}void InitMcbspb32bit(void)
{McbspbRegs.RCR1.bit.RWDLEN1=5;     // 32-bit wordMcbspbRegs.XCR1.bit.XWDLEN1=5;     // 32-bit word
}#endif //end DSP28_MCBSPBvoid InitMcbspGpio(void)
{InitMcbspaGpio();#if DSP28_MCBSPBInitMcbspbGpio();#endif               // end DSP28_MCBSPB
}void InitMcbspaGpio(void)
{EALLOW;/* Configure McBSP-A pins using GPIO regs*/
// This specifies which of the possible GPIO pins will be McBSP functional pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 2;	// GPIO20 is MDXA pinGpioCtrlRegs.GPAMUX2.bit.GPIO21 = 2;	// GPIO21 is MDRA pinGpioCtrlRegs.GPAMUX2.bit.GPIO22 = 2;	// GPIO22 is MCLKXA pin//GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 2;		// GPIO7 is MCLKRA pin (Comment as needed)GpioCtrlRegs.GPBMUX2.bit.GPIO58 = 1;	// GPIO58 is MCLKRA pin (Comment as needed)GpioCtrlRegs.GPAMUX2.bit.GPIO23 = 2;	// GPIO23 is MFSXA pin//GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 2;		// GPIO5 is MFSRA pin (Comment as needed)GpioCtrlRegs.GPBMUX2.bit.GPIO59 = 1;	// GPIO59 is MFSRA pin (Comment as needed)/* Enable internal pull-up for the selected pins */
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPAPUD.bit.GPIO20 = 0;     // Enable pull-up on GPIO20 (MDXA)GpioCtrlRegs.GPAPUD.bit.GPIO21 = 0;     // Enable pull-up on GPIO21 (MDRA)GpioCtrlRegs.GPAPUD.bit.GPIO22 = 0;     // Enable pull-up on GPIO22 (MCLKXA)//GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0;      // Enable pull-up on GPIO7 (MCLKRA) (Comment as needed)GpioCtrlRegs.GPBPUD.bit.GPIO58 = 0;   // Enable pull-up on GPIO58 (MCLKRA) (Comment as needed)GpioCtrlRegs.GPAPUD.bit.GPIO23 = 0;     // Enable pull-up on GPIO23 (MFSXA)//GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0;      // Enable pull-up on GPIO5 (MFSRA) (Comment as needed)GpioCtrlRegs.GPBPUD.bit.GPIO59 = 0;   // Enable pull-up on GPIO59 (MFSRA) (Comment as needed)/* Set qualification for selected pins to asynch only */
// This will select asynch (no qualification) for the selected pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPAQSEL2.bit.GPIO20 = 3;   // Asynch input GPIO20 (MDXA)GpioCtrlRegs.GPAQSEL2.bit.GPIO21 = 3;   // Asynch input GPIO21 (MDRA)GpioCtrlRegs.GPAQSEL2.bit.GPIO22 = 3;   // Asynch input GPIO22 (MCLKXA)//GpioCtrlRegs.GPAQSEL1.bit.GPIO7 = 3;    // Asynch input GPIO7 (MCLKRA) (Comment as needed)GpioCtrlRegs.GPBQSEL2.bit.GPIO58 = 3; // Asynch input GPIO58(MCLKRA) (Comment as needed)GpioCtrlRegs.GPAQSEL2.bit.GPIO23 = 3;   // Asynch input GPIO23 (MFSXA)//GpioCtrlRegs.GPAQSEL1.bit.GPIO5 = 3;    // Asynch input GPIO5 (MFSRA) (Comment as needed)GpioCtrlRegs.GPBQSEL2.bit.GPIO59 = 3; // Asynch input GPIO59 (MFSRA) (Comment as needed)EDIS;
}#if DSP28_MCBSPB
void InitMcbspbGpio(void)
{EALLOW;
/* Configure McBSP-A pins using GPIO regs*/
// This specifies which of the possible GPIO pins will be McBSP functional pins.
// Comment out other unwanted lines.//GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 3;	// GPIO12 is MDXB pin (Comment as needed)GpioCtrlRegs.GPAMUX2.bit.GPIO24 = 3;	// GPIO24 is MDXB pin (Comment as needed)//GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 3;	// GPIO13 is MDRB pin (Comment as needed)GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 3;	// GPIO25 is MDRB pin (Comment as needed)//GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 3;	// GPIO14 is MCLKXB pin (Comment as needed)GpioCtrlRegs.GPAMUX2.bit.GPIO26 = 3;	// GPIO26 is MCLKXB pin (Comment as needed)GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 3;		// GPIO3 is MCLKRB pin (Comment as needed)//GpioCtrlRegs.GPBMUX2.bit.GPIO60 = 1;	// GPIO60 is MCLKRB pin (Comment as needed)//GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 3;	// GPIO15 is MFSXB pin (Comment as needed)GpioCtrlRegs.GPAMUX2.bit.GPIO27 = 3;	// GPIO27 is MFSXB pin (Comment as needed)GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 3;		// GPIO1 is MFSRB pin (Comment as needed)//GpioCtrlRegs.GPBMUX2.bit.GPIO61 = 1;	// GPIO61 is MFSRB pin (Comment as needed)/* Enable internal pull-up for the selected pins */
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0;	    // Enable pull-up on GPIO24 (MDXB) (Comment as needed)//GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;	// Enable pull-up on GPIO12 (MDXB) (Comment as needed)GpioCtrlRegs.GPAPUD.bit.GPIO25 = 0;	    // Enable pull-up on GPIO25 (MDRB) (Comment as needed)//GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0;	// Enable pull-up on GPIO13 (MDRB) (Comment as needed)GpioCtrlRegs.GPAPUD.bit.GPIO26 = 0;	    // Enable pull-up on GPIO26 (MCLKXB) (Comment as needed)//GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0;	// Enable pull-up on GPIO14 (MCLKXB) (Comment as needed)GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0;		// Enable pull-up on GPIO3 (MCLKRB) (Comment as needed)//GpioCtrlRegs.GPBPUD.bit.GPIO60 = 0;	// Enable pull-up on GPIO60 (MCLKRB) (Comment as needed)GpioCtrlRegs.GPAPUD.bit.GPIO27 = 0;	    // Enable pull-up on GPIO27 (MFSXB) (Comment as needed)//GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0;	// Enable pull-up on GPIO15 (MFSXB) (Comment as needed)GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0;		// Enable pull-up on GPIO1 (MFSRB) (Comment as needed)//GpioCtrlRegs.GPBPUD.bit.GPIO61 = 0;	// Enable pull-up on GPIO61 (MFSRB) (Comment as needed)/* Set qualification for selected pins to asynch only */
// This will select asynch (no qualification) for the selected pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPAQSEL2.bit.GPIO24 = 3;   // Asynch input GPIO24 (MDXB) (Comment as needed)//GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3; // Asynch input GPIO12 (MDXB) (Comment as needed)GpioCtrlRegs.GPAQSEL2.bit.GPIO25 = 3;   // Asynch input GPIO25 (MDRB) (Comment as needed)//GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3; // Asynch input GPIO13 (MDRB) (Comment as needed)GpioCtrlRegs.GPAQSEL2.bit.GPIO26 = 3;   // Asynch input GPIO26(MCLKXB) (Comment as needed)//GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3; // Asynch input GPIO14 (MCLKXB) (Comment as needed)GpioCtrlRegs.GPAQSEL1.bit.GPIO3 = 3;    // Asynch input GPIO3 (MCLKRB) (Comment as needed)//GpioCtrlRegs.GPBQSEL2.bit.GPIO60 = 3; // Asynch input GPIO60 (MCLKRB) (Comment as needed)GpioCtrlRegs.GPAQSEL2.bit.GPIO27 = 3;   // Asynch input GPIO27 (MFSXB) (Comment as needed)//GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3; // Asynch input GPIO15 (MFSXB) (Comment as needed)GpioCtrlRegs.GPAQSEL1.bit.GPIO1 = 3;    // Asynch input GPIO1 (MFSRB) (Comment as needed)//GpioCtrlRegs.GPBQSEL2.bit.GPIO61 = 3; // Asynch input GPIO61 (MFSRB) (Comment as needed)EDIS;
}
#endif                // end DSP28_MCBSPBvoid delay_loop(void)
{long      i;for (i = 0; i < MCBSP_INIT_DELAY; i++) {} //delay in McBsp init. must be at least 2 SRG cycles
}void clkg_delay_loop(void)
{long      i;for (i = 0; i < MCBSP_CLKG_DELAY; i++) {} //delay in McBsp init. must be at least 2 SRG cycles
}
//===========================================================================
// No more.
//===========================================================================

// TI File $Revision: /main/1 $
// Checkin $Date: August 18, 2006   13:46:27 $
//###########################################################################
//
// FILE:	DSP2833x_I2C.c
//
// TITLE:	DSP2833x SCI Initialization & Support Functions.
//
//###########################################################################
// $TI Release: DSP2833x Header Files V1.01 $
// $Release Date: September 26, 2007 $
//############################################################################include "DSP2833x_Device.h"     // DSP2833x Headerfile Include File
#include "DSP2833x_Examples.h"   // DSP2833x Examples Include File//---------------------------------------------------------------------------
// InitI2C: 
//---------------------------------------------------------------------------
// This function initializes the I2C to a known state.
//
void InitI2C(void)
{// Initialize I2C-A://
}	//---------------------------------------------------------------------------
// Example: InitI2CGpio: 
//---------------------------------------------------------------------------
// This function initializes GPIO pins to function as I2C pins
//
// Each GPIO pin can be configured as a GPIO pin or up to 3 different
// peripheral functional pins. By default all pins come up as GPIO
// inputs after reset.  
// 
// Caution: 
// Only one GPIO pin should be enabled for SDAA operation.
// Only one GPIO pin shoudl be enabled for SCLA operation. 
// Comment out other unwanted lines.void InitI2CGpio()
{EALLOW;
/* Enable internal pull-up for the selected pins */
// Pull-ups can be enabled or disabled disabled by the user.  
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0;    // Enable pull-up for GPIO32 (SDAA)GpioCtrlRegs.GPBPUD.bit.GPIO33 = 0;	   // Enable pull-up for GPIO33 (SCLA)/* Set qualification for selected pins to asynch only */
// This will select asynch (no qualification) for the selected pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPBQSEL1.bit.GPIO32 = 3;  // Asynch input GPIO32 (SDAA)GpioCtrlRegs.GPBQSEL1.bit.GPIO33 = 3;  // Asynch input GPIO33 (SCLA)/* Configure SCI pins using GPIO regs*/
// This specifies which of the possible GPIO pins will be I2C functional pins.
// Comment out other unwanted lines.GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 1;   // Configure GPIO32 for SDAA operationGpioCtrlRegs.GPBMUX1.bit.GPIO33 = 1;   // Configure GPIO33 for SCLA operationEDIS;
}//===========================================================================
// End of file.
//===========================================================================

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