DSP28377D CPU2实现SCI通讯

DSP28377D CPU2实现SCI通讯

TMS28377D CPU2实现SCI通讯

前言

在使用TI的DSP 28377D时，有时需要用CPU2来控制SCI，本文主要介绍通过CPU2来实现SCI通讯。

一、使用步骤

1.代码实现

TMS28377D CPU2实现SCI通讯

前言

在使用TI的DSP 28377D时，有时需要用CPU2来控制SCI，本文主要介绍通过CPU2来实现SCI串口通讯。

一、使用步骤

1.代码实现

1）CPU1主要初始化的代码：
代码如下（示例）：
InitSysCtrl();
//-----------------------------------------------------
InitIpc();
//----------------------------------------------------
#ifdef _STANDALONE
#ifdef _FLASH
// Send boot command to allow the CPU02 application to begin execution
IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH);
#else
// Send boot command to allow the CPU02 application to begin execution
IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_RAM);
#endif
#endif
InitGpio();
GPIO_SetupPinMux(64, GPIO_MUX_CPU2, 6); //GPIO64 – SCIRXA 将IO口定义给CPU2
GPIO_SetupPinMux(84, GPIO_MUX_CPU2, 5); //GPIO84 – SCITXA 将IO口定义给CPU2
//--------------------------------------------------------------
DINT;
IER = 0x0000;
IFR = 0x0000;

InitPieVectTable();

//---------------------------------------------------------------------------
InitPeripheral(); //初始化外设
//---------------------------------------------------------------------------
// Give Memory Access to GS0/ GS14 SARAM to CPU02
//
while( !(MemCfgRegs.GSxMSEL.bit.MSEL_GS0 &
MemCfgRegs.GSxMSEL.bit.MSEL_GS14))
{
EALLOW;
MemCfgRegs.GSxMSEL.bit.MSEL_GS0 = 1;
MemCfgRegs.GSxMSEL.bit.MSEL_GS14 = 1;
EDIS;
}
EALLOW;
DevCfgRegs.CPUSEL5.bit.SCI_A = 1; //将外设权力交给CPU2 这个非常重要
EDIS;

1）CPU2主要初始化的代码
void main(void)
{
DINT;

InitPieCtrl();

IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
// Wait until Shared RAM is available.
while(!( MemCfgRegs.GSxMSEL.bit.MSEL_GS0 &
MemCfgRegs.GSxMSEL.bit.MSEL_GS14 ))
{
}
memcpy(&isrfuncRunStart, &isrfuncLoadStart, (uint32_t)&isrfuncLoadSize);

EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.TIMER0_INT = &cpu_timer0_isr;
PieVectTable.SCIA_RX_INT = &sciaRxFifoIsr; //串口中断使能

CpuSysRegs.PCLKCR7.bit.SCI_A= 1; //CPU2串口时钟使能

EDIS; // This is needed to disable write to EALLOW protected
InitCpuTimers(); // For this example, only initialize the Cpu Timers
scia_fifo_init(); // Init SCI-A 串口初始化
// Configure CPU-Timer0 to interrupt every second:
// c2_FREQ in MHz, 1 second Period (in uSeconds)
ConfigCpuTimer(&CpuTimer0, 200, 1000000);
CpuTimer0Regs.TCR.all = 0x4000;
//
IER |= (M_INT1|M_INT9); //INT1-TIM0 INT3-EPWM INT9-RX TX
PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
PieCtrlRegs.PIEIER9.bit.INTx1 = 1; // PIE Group 9, INT1 RX
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; //使能PIE
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
while(1)
{
if(IPCRtoLFlagBusy(IPC_FLAG10) == 1)
{
// Read c2_r_array and modify c2_r_w_array
Shared_Ram_dataWrite_c2();
IPCRtoLFlagAcknowledge (IPC_FLAG10);
}
}
}
//------------------------------------------------------------------
// scia_fifo_init - Configure SCIA FIFO
//------------------------------------------------------------------
void scia_fifo_init()
{
SciaRegs.SCICCR.all = 0x0007; // 1 stop bit, No loopback
// No parity,8 char bits,
// async mode, idle-line protocol
SciaRegs.SCICTL1.all = 0x0003; // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
SciaRegs.SCICTL2.bit.TXINTENA = 1;
SciaRegs.SCICTL2.bit.RXBKINTENA = 1;
SciaRegs.SCIHBAUD.all = 0x0002;
SciaRegs.SCILBAUD.all = 0x008B; //9600
SciaRegs.SCICCR.bit.LOOPBKENA = 0; // Enable loop back
SciaRegs.SCIFFTX.all = 0xC021;
SciaRegs.SCIFFRX.all = 0x0021; //RXFFIENA 使能 接收FF中断
SciaRegs.SCIFFCT.all = 0x00;

SciaRegs.SCICTL1.all = 0x0023; // Relinquish SCI from Reset
SciaRegs.SCIFFTX.bit.TXFIFORESET = 1;
SciaRegs.SCIFFRX.bit.RXFIFORESET = 1;
}
//------------------------------------------------------------------
// sciaRxFifoIsr - SCIA Receive FIFO ISR
//------------------------------------------------------------------
interrupt void sciaRxFifoIsr(void)
{
uint16_t i;
i=SciaRegs.SCIRXBUF.all; // Read data
while (SciaRegs.SCIFFTX.bit.TXFFST != 0) {}
SciaRegs.SCITXBUF.all=i; // Send data
SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1; // Clear Overflow flag
SciaRegs.SCIFFRX.bit.RXFFINTCLR=1; // Clear Interrupt flag
PieCtrlRegs.PIEACK.all|=0x100; // Issue PIE ack
}
// cpu_timer0_isr - CPU Timer0 ISR
interrupt void cpu_timer0_isr(void)
{
EALLOW;
CpuTimer0.InterruptCount++;
GpioDataRegs.GPATOGGLE.bit.GPIO31 = 1;
EDIS;

PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}
//
void Shared_Ram_dataWrite_c2(void)
{
uint16_t index;
uint16_t multiplier;
multiplier = c2_r_array[0];
c2_r_w_array[0] = multiplier;
for(index = 1; index < 256; index ++)
{
c2_r_w_array[index] = multiplier*c2_r_array[index];
}
}

总结

以上就是今天要讲的内容，本文仅仅简单介绍了DSP28377D的CPU2控制的SCI通讯的使用，提供了使用CPU2的SCI的代码例程。